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Elimination of bipolar induced drain breakdown and single transistor latch in submicron PD SOI MOSFET.
Mamidala Jagadesh Kumar
Vikram Verma
Published in:
IEEE Trans. Reliab. (2002)
Keyphrases
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low power
high density
high speed
power consumption
low cost
integrated circuit
data sets
positive and negative
vlsi circuits
real time
neural network
computer vision
decision support system
power dissipation
leakage current