A gate level methodology for efficient statistical leakage estimation in complex 32nm circuits.
Smriti JoshiAnne LombardotMarc BellevilleEdith BeignéStéphane GirardPublished in: DATE (2013)
Keyphrases
- cmos technology
- higher level
- computationally expensive
- computationally intensive
- complex data
- statistical methods
- estimation error
- complex systems
- statistically sound
- statistical models
- leakage current
- database
- coarse grained
- levels of abstraction
- parameter estimation
- computationally efficient
- lightweight
- statistical analysis
- high speed
- image sequences
- real world
- neural network