A 10Mbit, 15GBytes/sec bandwidth 1T DRAM chip with planar MOS storage capacitor in an unmodified 150nm logic process for high-density on-chip memory applications.
Dinesh SomasekharShih-Lien LuBradley A. BloechelGreg DermerKonrad LaiSjeljar BorkarVivek DePublished in: ESSCIRC (2005)