Program-Counter-Less Bit-Serial Field-Programmable VLSI Processor with Mesh-Connected Cellular Array Structure.
Naotaka OhsawaOsamu SakamotoMasanori HariyamaMichitaka KameyamaPublished in: ISVLSI (2004)
Keyphrases
- processor array
- mesh connected
- single chip
- array processor
- parallel implementation
- parallel algorithm
- binary images
- massively parallel
- image processing tasks
- high speed
- random access memory
- general purpose
- parallel processing
- low power
- computer vision
- low cost
- parallel computers
- feature detection
- co occurrence
- multiscale