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A gate-coupled PTLSCR/NTLSCR ESD protection circuit for deep-submicron low-voltage CMOS ICs.
Ming-Dou Ker
Hun-Hsien Chang
Chung-Yu Wu
Published in:
IEEE J. Solid State Circuits (1997)
Keyphrases
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low voltage
cmos technology
low power
mixed signal
vlsi circuits
power consumption
high speed
power dissipation
low cost
leakage current
power line
random access memory
digital signal processing
parallel processing
electron beam
image sensor
power management
cost effective
silicon on insulator