Implementation of a custom hardware-accelerator for short-read mapping using Burrows-Wheeler alignment.
Hasitha Muthumala WaidyasooriyaMasanori HariyamaMichitaka KameyamaPublished in: EMBC (2013)
Keyphrases
- hardware implementation
- graphics cards
- field programmable gate array
- circuit design
- parallel implementation
- low cost
- computing power
- real time
- graphics processing units
- vlsi implementation
- hardware architecture
- hardware architectures
- computing systems
- hardware and software
- fpga technology
- data acquisition
- signal processing
- parallel architecture
- data management
- graphics processors
- software implementation
- hardware design
- computer systems
- image alignment
- application specific
- embedded systems