45pW ESD clamp circuit for ultra-low power applications.
Yen-Po ChenYoonmyung LeeJae-Yoon SimMassimo AliotoDavid T. BlaauwDennis SylvesterPublished in: CICC (2013)
Keyphrases
- ultra low power
- low power
- high speed
- logic circuits
- cmos technology
- power consumption
- power dissipation
- analog circuits
- low cost
- tunnel diode
- electronic circuits
- single chip
- digital circuits
- power reduction
- image processing
- low power consumption
- real time
- circuit design
- multiscale
- frequency response
- delay insensitive
- gallium arsenide