A Lower Bound on the Gate Count of Toffoli-Based Reversible Logic Circuits.
Takashi HirayamaHayato SugawaraKatsuhisa YamanakaYasuaki NishitaniPublished in: IEICE Trans. Inf. Syst. (2014)
Keyphrases
- logic circuits
- lower bound
- upper bound
- low power
- branch and bound algorithm
- branch and bound
- functional decomposition
- cellular automata
- tunnel diode
- markov chain
- np hard
- optimal solution
- gate array
- lower and upper bounds
- worst case
- high speed
- objective function
- power consumption
- logic synthesis
- low cost
- multistage
- sufficiently accurate
- pattern recognition