Gate level representation of ECL circuits for fault modeling.

Sankaran M. Menon Anura P. Jayasumana Yashwant K. Malaiya

Published in: Great Lakes Symposium on VLSI (1991)

Keyphrases

modeling tool
higher level
image representation
fault diagnosis
levels of abstraction
model construction
dynamic bayesian networks
cmos technology
geometric modeling
real time embedded systems