Reconfigurable DSP IP for multimedia applications.
Maurizio MartinaGuido MaseraGianluca PiccininiFabrizio VaccaMaurizio ZamboniPublished in: ICASSP (2002)
Keyphrases
- systolic array
- digital signal
- reconfigurable architecture
- signal processing
- digital signal processing
- hardware implementation
- digital signal processor
- data flow
- quality of service
- multimedia
- ip networks
- field programmable gate array
- multimedia processing
- parallel architecture
- low cost
- general purpose
- multimedia content
- video processing
- multimedia data
- high speed
- computer vision
- multimedia communication
- real time image processing
- image processing algorithms
- heterogeneous computing
- internet protocol
- application layer
- data sets
- pattern recognition
- image processing
- neural network