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Transaction Level Error Susceptibility Model for Bus Based SoC Architectures.
Ing-Chao Lin
Suresh Srinivasan
Narayanan Vijaykrishnan
Nagu R. Dhanwada
Published in:
ISQED (2006)
Keyphrases
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formal model
high level
objective function
database
statistical model
cost function
computational model
mathematical model
probabilistic model
information retrieval
theoretical framework
parameter estimation
high speed
multiscale
higher level
least squares
process model
prior knowledge
information systems