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A Sub-100 fs-Jitter 8.16-GHz Ring-Oscillator-Based Power-Gating Injection-Locked Clock Multiplier With the Multiplication Factor of 68.
Suneui Park
Seyeon Yoo
Yuhwan Shin
Jeonghyun Lee
Jaehyouk Choi
Published in:
IEEE J. Solid State Circuits (2023)
Keyphrases
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power consumption
floating point
high speed
clock frequency
duty cycle
low power
feature selection
fixed point
hardware implementation
type ii
differential equations
lung cancer
arithmetic operations
power reduction