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Highly reliable single-ended current-mode circuit for an inter-chip asynchronous communication link.
Akira Mochizuki
Hirokatsu Shirahama
Naoya Onizawa
Takahiro Hanyu
Published in:
APCCAS (2014)
Keyphrases
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highly reliable
high speed
circuit design
analog vlsi
low cost
low voltage
printed circuit boards
delay insensitive
short circuit
phase locked loop
database
chip design
cmos technology
signal processing
neural network
data sets
real time