Wirelength driven I/O buffer placement for flip-chip with timing-constrained.
Nan LiuShiyu LiuTakeshi YoshimuraPublished in: APCCAS (2012)
Keyphrases
- input output
- virtual memory
- memory access
- replacement policy
- ibm power processor
- low cost
- main memory
- ibm zenterprise
- analog vlsi
- vlsi implementation
- high speed
- data driven
- high bandwidth
- wireless sensor networks
- buffer size
- physical design
- single chip
- database
- buffer management
- programmable logic
- high density
- functional verification
- gigabit ethernet