Low Power Dissipation in BIST Schemes for Modified Booth Multipliers.
Xrysovalantis KavousianosDimitris BakalisHaridimos T. VergosDimitris NikolosGeorge AlexiouPublished in: DFT (1999)
Keyphrases
- low power
- energy dissipation
- power consumption
- high speed
- low cost
- single chip
- high power
- wireless transmission
- vlsi architecture
- low power consumption
- numerical solution
- digital signal processing
- vlsi circuits
- image sensor
- logic circuits
- nm technology
- gate array
- cmos technology
- power dissipation
- hardware and software