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Energy-Efficient Processor Design Using Multiple Clock Domains with Dynamic Voltage and Frequency Scaling.
Greg Semeraro
Grigorios Magklis
Rajeev Balasubramonian
David H. Albonesi
Sandhya Dwarkadas
Michael L. Scott
Published in:
HPCA (2002)
Keyphrases
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energy efficient
wireless sensor networks
high speed
sensor networks
energy consumption
computer architecture
fpga device
duty cycle
computer systems
anomaly detection
routing protocol
parallel processing
multi hop
data dissemination
clock gating