Energy-Efficient 4T SRAM Bitcell with 2T Read-Port for Ultra-Low-Voltage Operations in 28 nm 3D Monolithic CoolCubeTM Technology.
Reda BoumcheddaJean-Philippe NoelBastien GiraudAdam MakosiejMarco Antonio RiosEduardo EsmanhottoEmilien Bourde-CicéMathis BelletDavid TurgisEdith BeignéPublished in: NANOARCH (2018)
Keyphrases
- cmos technology
- energy efficient
- low voltage
- power consumption
- low power
- energy efficiency
- leakage current
- wireless sensor networks
- high speed
- random access memory
- energy consumption
- parallel processing
- sensor networks
- data transmission
- power line
- power dissipation
- embedded dram
- base station
- energy saving
- routing protocol
- low cost
- power management
- silicon on insulator
- design considerations
- image sensor
- digital signal processing
- response time
- computer systems
- database systems
- routing algorithm
- end to end