Performance modeling and optimization for on-chip interconnects in 3D memory arrays.

Javaneh Mohseni Chenyun Pan Azad Naeemi

Published in: ISQED (2016)

Keyphrases

power dissipation
optimization algorithm
high speed
memory usage
computing power
input output
optimization method
main memory
global optimization
optimization process
analog vlsi
high density
computational power
memory access
focal plane
level parallelism