On-Chip Interconnection Architecture of the Tile Processor.
David WentzlaffPatrick GriffinHenry HoffmannLiewei BaoBruce EdwardsCarl RameyMatthew MattinaChyi-Chang MiaoJohn F. Brown IIIAnant AgarwalPublished in: IEEE Micro (2007)
Keyphrases
- high speed
- multithreading
- level parallelism
- high density
- single chip
- memory access
- parallel architecture
- instruction set
- ibm power processor
- ibm zenterprise
- analog vlsi
- vlsi implementation
- memory subsystem
- host computer
- multi processor
- design considerations
- floating point arithmetic
- systolic array
- functional verification
- parallel processing
- management system
- random access memory
- chip design
- input output
- processor core
- memory management
- industry standard
- multi core processors
- processing units
- design methodology
- embedded dram
- cmos image sensor
- computer architecture
- computation intensive
- processing elements