A fully connected layer elimination for a binarizec convolutional neural network on an FPGA.

Hiroki Nakahara Tomoya Fujii Shimpei Sato

Published in: FPL (2017)

Keyphrases

fully connected
convolutional neural network
face detection
conditional random fields
scale free
signal processing
field programmable gate array
neural network
generative model
hardware implementation
activation function