Reducing the signal Electromigration effects on different logic gates by cell layout optimization.
Gracieli PosserLucas de ParisVivek MishraPalkesh JainRicardo ReisSachin S. SapatnekarPublished in: LASCAS (2015)
Keyphrases
- logic circuits
- optimization problems
- global optimization
- optimization algorithm
- optimization process
- signal processing
- discrete optimization
- optimization methods
- inter cell
- signal detection
- optimization method
- high frequency
- logic programming
- low power
- optimization model
- joint optimization
- non stationary
- microscope images
- multiresolution
- data sets