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8.7 A 4-to-10.5Gb/s 2.2mW/Gb/s continuous-rate digital CDR with automatic frequency acquisition in 65nm CMOS.
Guanghua Shu
Woo-Seok Choi
Saurabh Saxena
Tejasvi Anand
Amr Elshazly
Pavan Kumar Hanumolu
Published in:
ISSCC (2014)
Keyphrases
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high speed
power consumption
circuit design
power supply
metal oxide semiconductor
data acquisition
low power
semi automatic
phase locked loop
cmos technology
cmos image sensor
hd video
nm technology
multimedia
image sequences
mixed signal