A configurable fault-tolerant glitch-free clock switching circuit.

Haochi Wang Yanlong Zhang Xuewu Li Lei Chen Zhiping Wen Kun Zhang Min Wang

Published in: MWSCAS (2013)

Keyphrases

fault tolerant
high speed
fault tolerance
duty cycle
tunnel diode
distributed systems
evolvable hardware
load balancing
safety critical
high availability
circuit design
digital circuits
state machine
power consumption
information flow
low power
mobile agent system