Improving Soft Error Robustness of Full Adder Circuits with Decoupling Cell and Transistor Sizing.
Rafael N. M. OliveiraFábio G. R. G. da SilvaRicardo ReisRafael B. SchvittzCristina MeinhardtPublished in: SBCCI (2022)
Keyphrases
- power dissipation
- high speed
- low power
- logic circuits
- power consumption
- input output
- circuit design
- error rate
- integrated circuit
- logic synthesis
- error analysis
- high robustness
- stem cell
- floating gate
- tunnel diode
- analog circuits
- real time
- error measure
- relative error
- generalization error
- estimation error
- error bounds
- low cost
- motion estimation