Login / Signup
Fast Statistical Timing Analysis for Circuits with Post-Silicon Tunable Clock Buffers.
Bing Li
Ning Chen
Ulf Schlichtmann
Published in:
CoRR (2017)
Keyphrases
</>
high speed
power consumption
cmos technology
real time
data driven
low power
case study
production system
statistical tests
statistical models
statistical methods
high density
delay insensitive