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HMP-ASIPs: heterogeneous multi-pipeline application-specific instruction-set processors.
Swarnalatha Radhakrishnan
Hui Guo
Sri Parameswaran
Aleksandar Ignjatovic
Published in:
IET Comput. Digit. Tech. (2009)
Keyphrases
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instruction set
application specific
general purpose
level parallelism
memory subsystem
database
operating system
file system
ibm power processor
instruction set architecture