Highly Parallel Implementation of Harris Corner Detector on CSX SIMD Architecture.

Fouzhan Hosseini Amir Fijany Jean-Guy Fontaine

Published in: Euro-Par Workshops (2010)

Keyphrases

highly parallel
efficient implementation
parallel architectures
single pass
computing systems
single chip
general purpose
harris corner detector
graphics processing units
single instruction multiple data
database systems
high resolution
parallel processing
hardware design
parallel computers