HW/SW co-verification of embedded systems using bounded model checking.

Daniel Große Ulrich Kühne Rolf Drechsler

Published in: ACM Great Lakes Symposium on VLSI (2006)

Keyphrases

bounded model checking
hw sw
embedded systems
model checking
formal verification
hardware software
low cost
temporal logic
linear temporal logic
design methodology
multi agent systems
resource constrained
field programmable gate array
hardware and software
software systems
artificial intelligence
high level