Using Combinational Verification for Sequential Circuits.

Rajeev K. Ranjan Vigyan Singhal Fabio Somenzi Robert K. Brayton

Published in: DATE (1999)

Keyphrases

asynchronous circuits
delay insensitive
logic circuits
model checking
high speed
sequential data
neural network
circuit design
digital circuits
formal analysis
tunnel diode
vlsi circuits
electronic circuits
formal verification
database
petri net
hidden markov models
feature selection
information retrieval
real time