NeuronLink: An Efficient Chip-to-Chip Interconnect for Large-Scale Neural Network Accelerators.
Shanlin XiaoYuhao GuoWenkang LiaoHuipeng DengYi LuoHuanliang ZhengJian WangCheng LiGezi LiZhiyi YuPublished in: IEEE Trans. Very Large Scale Integr. Syst. (2020)
Keyphrases
- high speed
- neural network
- single chip
- low cost
- power dissipation
- analog vlsi
- ibm power processor
- high density
- low power
- pattern recognition
- real time
- power consumption
- functional verification
- computing systems
- artificial neural networks
- programmable logic
- vlsi implementation
- physical design
- real world
- clock frequency
- genetic algorithm
- evolvable hardware
- learning algorithm
- circuit design
- chip design
- feed forward
- back propagation