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Design and evaluation of high performance microprocessor with reconfigurable on-chip memory.
T. Ohneda
Masaaki Kondo
Masashi Imai
Hiroshi Nakamura
Published in:
APCCAS (1) (2002)
Keyphrases
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circuit design
physical design
functional verification
memory subsystem
high speed
design methodology
embedded dram
low cost
random access memory
single chip
chip design
design considerations
power dissipation
programmable logic
low power consumption
power reduction