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Logic Process Compatible 40-nm 16-Mb, Embedded Perpendicular-MRAM With Hybrid-Resistance Reference, Sub- $\mu$ A Sensing Resolution, and 17.5-nS Read Access Time.

Yi-Chun ShihChia-Fu LeeYen-An ChangPo-Hao LeeHon-Jarn LinYu-Lin ChenKu-Feng LinTa-Ching YehHung-Chang YuHarry ChuangYu-Der ChihTsung-Yung Jonathan Chang
Published in: IEEE J. Solid State Circuits (2019)
Keyphrases
  • low resolution
  • process model
  • real time
  • high resolution
  • times faster
  • development process
  • embedded systems