Generating MC/DC Adequate Test Sequences Through Model Checking.
Sanjai RayadurgamMats Per Erik HeimdahlPublished in: SEW (2003)
Keyphrases
- model checking
- test sequences
- temporal logic
- model checker
- test cases
- temporal properties
- automated verification
- symbolic model checking
- formal verification
- test generation
- video sequences
- formal specification
- formal methods
- timed automata
- finite state
- finite state machines
- reachability analysis
- bounded model checking
- epistemic logic
- verification method
- bit rate
- computation tree logic
- transition systems
- process algebra
- concurrent systems
- pspace complete
- linear temporal logic
- reactive systems
- planning domains
- modal logic
- high quality
- case study