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A 65 nm CMOS Synthesizable Digital Low-Dropout Regulator Based on Voltage-to-Time Conversion with 99.6% Current Efficiency at 10-mA Load.
Naoki Ojima
Toru Nakura
Tetsuya Iizuka
Kunihiro Asada
Published in:
VLSI-SoC (Selected Papers) (2018)
Keyphrases
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low voltage
cmos technology
mixed signal
design considerations
random access memory
low power
power supply
parallel processing
power management
reactive power compensation
low cost
data conversion
computational complexity
high speed
metal oxide semiconductor