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A 4-Transistor nMOS-Only Logic-Compatible Gain-Cell Embedded DRAM With Over 1.6-ms Retention Time at 700 mV in 28-nm FD-SOI.
Robert Giterman
Alexander Fish
Andreas Burg
Adam Teman
Published in:
IEEE Trans. Circuits Syst. I Regul. Pap. (2018)
Keyphrases
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embedded dram
metal oxide semiconductor
cmos technology
silicon on insulator
low power
dynamic random access memory
integrated circuit
low cost
power dissipation
random access memory
power consumption
dynamic logic
high speed
low voltage
image sensor
modal logic
design considerations
real time