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Dual-Edge-Triggered Flip-Flop-Based High-Level Synthesis with Programmable Duty Cycle.

Keisuke InoueMineo Kaneko
Published in: IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (2013)
Keyphrases
  • high level synthesis
  • duty cycle
  • real time
  • flip flops
  • low cost
  • design space exploration
  • parallel architecture
  • case study
  • pattern recognition
  • image processing
  • image segmentation