Cost-efficient Formal Block Verification for ASIC Design.
Klaus WinkelmannHans-Joachim TrylusDominik StoffelGörschwin FeyPublished in: MBMV (2003)
Keyphrases
- cost efficient
- formal methods
- case study
- user interface
- functional verification
- circuit design
- formal analysis
- design process
- design principles
- formal model
- hardware architecture
- physical design
- hardware implementation
- real time
- general purpose
- digital images
- information systems
- artificial intelligence
- neural network
- data sets