Embedded PLL Phase Noise Measurement Based on a PFD/CP MASH 1-1-1 ΔΣ Time-to-Digital Converter in 7nm CMOS.
Mao-Hsuan ChouYa-Tin ChangTsung-Hsien TsaiTsung-Che LuChia-Chun LiaoHung-Yi KuoRuey-Bin SheenChih-Hsien ChangKenny C.-H. HsiehAlvin L.-S. LokeMark ChenPublished in: VLSI Circuits (2020)
Keyphrases
- analog to digital converter
- metal oxide semiconductor
- low voltage
- data conversion
- circuit design
- cmos technology
- cmos image sensor
- low cost
- constraint programming
- embedded systems
- mixed signal
- silicon on insulator
- low power
- power supply
- nm technology
- integrated circuit
- control method
- power consumption
- high speed
- single phase
- control algorithm
- random access memory
- vlsi circuits
- real time
- digital media
- parallel processing
- high voltage
- single chip
- induction motor
- watermarking algorithm