Hardware Efficient Built-in Self-test Architecture for Power and Ground TSVs in 3D IC.
Donghyun HanYoungkwang LeeSooryeong LeeSungho KangPublished in: ISOCC (2021)
Keyphrases
- real time
- hardware architecture
- hardware implementation
- neural network
- hardware software
- power consumption
- efficient implementation
- vlsi implementation
- highly efficient
- vlsi architecture
- multithreading
- software implementation
- hardware design
- low latency
- computational power
- hardware and software
- computer systems
- genetic algorithm