Maximum mean weight cycle in a digraph and minimizing cycle time of a logic chip.
Christoph AlbrechtBernhard KorteJürgen SchietkeJens VygenPublished in: Discret. Appl. Math. (2002)
Keyphrases
- micron cmos
- chip design
- total weight
- high speed
- evolvable hardware
- classical logic
- high density
- logic programming
- maximum number
- digital circuits
- vlsi design
- random access memory
- built in self test
- low cost
- automated reasoning
- vlsi implementation
- modal logic
- multi valued
- image sensor
- circuit design
- physical design
- single chip