Co-simulation of On-Chip and On-Board AC Power Noise of CMOS Digital Circuits.
Kumpei YoshikawaYuta SasakiKouji IchikawaYoshiyuki SaitoMakoto NagataPublished in: IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (2012)
Keyphrases
- digital circuits
- circuit design
- chip design
- mixed signal
- evolvable hardware
- power consumption
- analog vlsi
- high speed
- power dissipation
- low power
- low cost
- finite state machines
- data flow
- physical design
- ultra low power
- model based diagnosis
- single chip
- fault diagnosis
- functional decomposition
- search algorithm
- ibm power processor
- nm technology
- databases
- design methodology
- focal plane
- signal to noise ratio
- cmos image sensor
- silicon on insulator