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A High-Performance, Low Leakage, and Stable SRAM Row-Based Back-Gate Biasing Scheme in FinFET Technology.
Rajiv V. Joshi
Keunwoo Kim
Richard Q. Williams
Edward J. Nowak
Ching-Te Chuang
Published in:
VLSI Design (2007)
Keyphrases
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leakage current
cmos technology
embedded dram
cost effective
power consumption
low power
nm technology
case study
low power consumption
classification scheme
data processing
random access memory
metal oxide semiconductor
information systems
key technologies
data transmission
low voltage
semi implicit