Robust on-chip bus architecture synthesis for MPSoCs under random tasks arrival.

Sujan Pandey Rolf Drechsler

Published in: ASP-DAC (2008)

Keyphrases

high speed
real time
low cost
management system
partial occlusion
vlsi implementation
analog vlsi
steady state
software architecture
host computer
associative memory
network architecture
high density
service times
single chip
program synthesis