Design of Asynchronous CNN Circuits on Commercial FPGA from Synchronous CNN Circuits.
Hayato KatoHiroshi SaitoPublished in: MCSoC (2019)
Keyphrases
- high level synthesis
- high speed
- circuit design
- cellular neural networks
- delay insensitive
- logic circuits
- power reduction
- parallel architecture
- digital circuits
- logic synthesis
- shift register
- single chip
- electronic circuits
- hardware implementation
- convolutional neural network
- analog circuits
- real time
- asynchronous communication
- gate array
- asynchronous circuits
- cmos technology
- hardware architecture
- design process
- low cost
- design space exploration
- hardware design
- quantum computing
- design methodology
- analog vlsi
- case study
- built in self test
- neural network