Equivalence checking of nonlinear analog circuits for hierarchical AMS System Verification.

Sebastian Steinhorst Lars Hedrich

Published in: VLSI-SoC (2012)

Keyphrases

analog circuits
fault diagnosis
digital circuits
verification method
neural network
model checking
coarse to fine
pattern recognition
wavelet packet transform
hierarchical structure
face verification
formal verification
signal processing
face recognition
image processing
decision making
computer vision