Clock Recovery Circuit Using a Transmission Line as a Delay Element from a 100Gb/s bit stream.
Ibrahim KaziPatrick ReynaertWim DehaenePublished in: NEWCAS (2022)
Keyphrases
- transmission line
- bitstream
- high speed
- network reliability
- tunnel diode
- coding scheme
- bit rate
- duty cycle
- compression algorithm
- video quality
- power system
- power dissipation
- wave propagation
- power consumption
- low power
- compressed video
- scalable video coding
- video transmission
- frame rate
- error resilience
- wavelet coefficients
- scalable video
- magnetic field
- differential equations
- dynamic characteristics
- error concealment
- operating conditions
- video coding
- real time
- subband
- packet loss
- error detection
- video streaming
- base layer
- artificial intelligence