An Ultra-Low Jitter, Low-Power, 102-GHz PLL Using a Power-Gating Injection-Locked Frequency Multiplier-Based Phase Detector.
Suneui ParkSeojin ChoiSeyeon YooYoonseo ChoJaehyouk ChoiPublished in: IEEE J. Solid State Circuits (2022)
Keyphrases
- low power
- power consumption
- high speed
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- clock frequency
- low power consumption
- power dissipation
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- energy dissipation
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- single chip
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- vlsi circuits
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- packet loss
- real time
- digital signal processing
- gate array
- floating point
- dielectric constant
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