High voltage tolerant ESD design for analog applications in deep submicron CMOS technologies.
Chung-Hui ChenYean-Kuen FangChien-Chun TsaiShen TuMark K. L. ChenMi-Chang ChangPublished in: CICC (2002)
Keyphrases
- high voltage
- circuit design
- mixed signal
- analog vlsi
- low power
- vlsi circuits
- vlsi architecture
- analog to digital converter
- learning algorithm
- single chip
- design parameters
- multi channel
- power consumption
- low cost
- active learning
- decision making
- cmos image sensor
- artificial intelligence
- design space
- digital circuits
- cmos technology
- high speed
- evolutionary algorithm
- chip design