Chip size and performance evaluations of shared cache for on-chip multiprocessor.
Takahiro SasakiTomohiro InoueNobuhiko OmoriTetsuo HironakaHans Jürgen MattauschTetsushi KoidePublished in: Systems and Computers in Japan (2005)
Keyphrases
- multithreading
- low cost
- high speed
- physical design
- high density
- analog vlsi
- memory subsystem
- single chip
- level parallelism
- processor core
- parallel computing
- circuit design
- shared memory multiprocessors
- data structure
- memory access
- hit rate
- vlsi implementation
- evolvable hardware
- programmable logic
- high bandwidth
- scheduling algorithm
- main memory
- data management