Designing leakage tolerant, low power wide-OR dominos for sub-130nm CMOS technologies.

Bhaskar Chatterjee Manoj Sachdev Ram Krishnamurthy

Published in: Microelectron. J. (2005)

Keyphrases

low power
cmos technology
power consumption
high speed
nm technology
low cost
single chip
image sensor
low voltage
power reduction
logic circuits
high power
wireless transmission
digital signal processing
vlsi circuits
ultra low power
mixed signal
low power consumption
vlsi architecture
leakage current
circuit design